Master

The device which initiates a transfer, generates clock signals and terminates a transfer.

Slave

The device addressed by a master.

Transmitter

The device which sends the data to the bus.

Receiver

The device which receives data from the bus.

Standard Mode

Maximum bit rate of 100 kbps.

Fast Mode

Maximum bit rate of 400 kbps.

High Speed Mode

Maximum bit rate of 3.4 Mbps.

SDA

Serial Data line. The signal used to transfer data between the transmitter and the receiver.

SCL

Serial Clock line. The signal used to synchronize communication between the master and the slave.

Multi-Master

More than one master can attempt to control the bus at the same time without corrupting the message.

Arbitration

Procedure to ensure that, if more than one master simultaneously tries to control the bus, only one is allowed to do so and the winning message is not corrupted.

Synchronization

Procedure to synchronize the clock signals of two or more devices.

Slave Address

Each slave has a unique address to identify it on the bus. These addresses are pre-defined, but the least significant bits can be set by the user to allow for multiples of the same device. In standard I2C, the slave address is 7-bits, but the protocol has been extended to also support 10-bit addresses.