SPI, Serial Peripheral Interface bus, is a synchronous serial data protocol that was developed by Motorola in the 1970s. The protocol was developed to replace parallel buses and provide high speed data transfers over short distances.
It is a full-duplex protocol that requires four signals: clock, master out/slave in, master in/slave out, and slave select. Data is simultaneously transmitted and received. SPI allows for multiple slaved devices to be controlled by a single master and each slave device has an individual slave select line.
Single mode SPI works for most use cases such as rapid prototyping, device programming, and automated testing. SPI is fast, with most single SPI serial throughput rates reaching around 10 Mbps. Single SPI parallel throughput rates ranges from 10 – 24 Mbps. However, a single data line will not be able to send data at SPI’s fastest speed.
Multi I/O SPI are capable of supporting increased throughput from a single device. SPI itself is full-duplex. Dual and Quad SPI are both half-duplex due to using 2-4 pins to send and receive. Switching to Dual or Quad SPI is done via sending a command byte while in Single SPI. The command byte will request a response in either dual or quad mode.
Dual SPI has a dual I/O interface that enables transfer rates to double compared to the standard serial Flash memory devices. The MISO and MOSI data pins operate in half-duplex mode to send two bits per clock cycle. The MOSI line become IO0 and the MISO line becomes IO1. Dual SPI serial throughput rates reach around 20 Mbps.
Quad SPI is similar to dual, but improves the throughput four times. Two additional data lines are added, and there are 4 bits transferred every clock cycle. The data lines are now IO0, IO1, IO2, and IO3. Quad SPI Serial throughput rates reach around 40 Mbps.
Multi I/O SPI is especially useful with memory-intensive data. Compared to classical SPI, which only uses one data line, Dual and Quad SPI use 2 and 4 data lines which will increase the data throughput 2 or 4 times.
Before Dual and Quad SPI was created, earlier solutions used parallel memory. Parallel memory would use 8-, 16-, or 32- pins to connect the external memory device to the microcontroller. When compared to parallel interfaces, Dual and Quad SPI allows for external flash memory chips to come in smaller packages. These small packages reduce PCB space on a board which helps simplify PCB design and reduces GPIOs.
The decision to use Dual or Quad SPI is based on pin count and the data transfer speed that developers wish to use. Flash chips that support Quad SPI generally support Dual SPI. Single, Dual, and Quad SPI are also pin-compatible. More information about the flash chip can be found on its respective datasheet.
Total Phase offers a variety of tools for different SPI configurations.
Our Aardvark I2C/SPI Host Adapter, Cheetah SPI Host Adapter, and Beagle I2C/SPI Protocol Analyzer support SPI Single I/O.
The Promira Serial Platform can support Single, Dual, or Quad I/O depending on the SPI Application. For a comparison of our SPI tools and whether it supports Single/Dual/Quad SPI, please the chart below:
Total Phase provides socket boards, like the Flash SOIC-16 Socket Board - 10/34 to help quickly program flash chips. Our Flash Center Software also allows users to quickly erase, program and verify EEPROM and Flash memory chips. To learn more about how Total Phase tools can verify and program Dual/Quad SPI Modes, please visit our blog: “What is the Easiest Way to Program and Verify a New SPI Memory Chip in Duo-Quad SPI Modes?”
For more information on how our tools can support Single, Dual, and Quad SPI, please contact us at sales@totalphase.com.